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CPU Architecture and the Fetch–Decode–Execute Cycle: Question 6

Syllabus 3.1

Multiple choice 1 mark

A CPU is about to fetch an instruction from RAM. The memory address register has already placed the address of that instruction onto one bus. Before any data travels back from RAM, the control unit sends a separate signal to RAM, telling it that the CPU wants to read from that address rather than write to it.

Which bus carries this read signal?

Choose an answer to check it, then compare with the worked solution below.
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Worked solution

Step 1: Recall what each bus (and the accumulator) is used for

  • The address bus carries the location in RAM that the CPU wants to access. In this scenario, it has already carried the instruction’s address.
  • The data bus carries the actual value or instruction being transferred between RAM and the CPU, once RAM has responded.
  • The control bus carries the signals that coordinate the transfer, including whether the CPU is requesting a read or a write, and timing/synchronisation signals.
  • The accumulator (ACC) is not a bus at all. It is a register inside the CPU that stores the result of an ALU operation.

Step 2: Match the description to a bus

The signal described tells RAM what to do (read, not write) rather than where to do it or what value is involved. The address has already been sent (on the address bus), and no value has travelled back yet (so the data bus is not yet in use for this transfer). That leaves the signal that specifies the type of operation being requested.

Step 3: Confirm the match

Telling RAM to perform a read rather than a write is exactly the kind of coordinating signal carried by the control bus, separate from the address itself and separate from any data value.

Final answer

The read signal is carried on the control bus, option C.