Processor Architectures and Boolean Algebra: Question 8
Syllabus 15.2
A logic circuit implements the Boolean expression Y = A.B + NOT A.C, where A, B and C are single-bit inputs.
(a) Complete the truth table for Y, for all eight combinations of A, B and C. [3]
| A | B | C | Y |
|---|---|---|---|
| 0 | 0 | 0 | ? |
| 0 | 0 | 1 | ? |
| 0 | 1 | 0 | ? |
| 0 | 1 | 1 | ? |
| 1 | 0 | 0 | ? |
| 1 | 0 | 1 | ? |
| 1 | 1 | 0 | ? |
| 1 | 1 | 1 | ? |
(b) State the number of rows in your completed table for which Y = 1. [1]
(c) List the individual logic gates needed to build a circuit that implements Y directly from the expression above, without first simplifying it, stating how many of each gate are required. [2]
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Worked solution
Part (a): Completing the truth table
Y = A.B + NOT A.C is worked out for each row by first finding A.B and NOT A.C separately, then combining them with OR.
| A | B | C | NOT A | A.B | NOT A.C | Y = A.B + NOT A.C |
|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 1 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 | 1 | 1 |
| 0 | 1 | 0 | 1 | 0 | 0 | 0 |
| 0 | 1 | 1 | 1 | 0 | 1 | 1 |
| 1 | 0 | 0 | 0 | 0 | 0 | 0 |
| 1 | 0 | 1 | 0 | 0 | 0 | 0 |
| 1 | 1 | 0 | 0 | 1 | 0 | 1 |
| 1 | 1 | 1 | 0 | 1 | 0 | 1 |
Two rows checked explicitly:
- Row A=0, B=0, C=1: NOT A = 1, so NOT A.C = 1.1 = 1; A.B = 0.0 = 0. Y = 0 + 1 = 1.
- Row A=1, B=0, C=1: NOT A = 0, so NOT A.C = 0.1 = 0; A.B = 1.0 = 0. Y = 0 + 0 = 0.
So the completed Y column is: 0, 1, 0, 1, 0, 0, 1, 1 (for ABC = 000, 001, 010, 011, 100, 101, 110, 111). [3 marks: 1 for the correct Y values when A = 0 (rows 000–011: 0, 1, 0, 1), 1 for the correct Y values when A = 1 (rows 100–111: 0, 0, 1, 1), 1 for the fully correct table overall]
Part (b): Counting rows where Y = 1
Reading down the completed Y column (0, 1, 0, 1, 0, 0, 1, 1), the value 1 appears in rows ABC = 001, 011, 110 and 111.
That is 4 rows out of the 8 where Y = 1. [1 mark]
Part (c): Gates needed to build the circuit directly
Building Y = A.B + NOT A.C exactly as written, without simplifying it first, requires:
- 1 NOT gate, to invert A and produce NOT A.
- 2 two-input AND gates: one to compute A.B, and a separate one to compute NOT A.C (using the output of the NOT gate as one of its inputs).
- 1 two-input OR gate, to combine the outputs of the two AND gates and produce Y.
That is 4 gates in total: 1 NOT, 2 AND, 1 OR. [2 marks: 1 for correctly including the NOT gate together with the two AND gates, 1 for the correct final OR gate combining them, with the correct total gate count]
Final answers
- (a) Y: 0, 1, 0, 1, 0, 0, 1, 1 (for ABC = 000, 001, 010, 011, 100, 101, 110, 111)
- (b) Y = 1 for 4 rows
- (c) 1 NOT gate, 2 (two-input) AND gates, 1 (two-input) OR gate, 4 gates in total