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CPU Architecture and the Fetch–Decode–Execute Cycle: Question 1

Syllabus 3.1

Multiple choice 1 mark

A computer science student is using a CPU simulator that displays the current contents of five named registers while a single machine-code instruction is fetched, decoded and executed. While the control unit is decoding the instruction, one particular register on the screen holds the exact bit pattern of that instruction, unchanged, right up until the next fetch stage begins and a new bit pattern is loaded into it.

Which register is being described?

Choose an answer to check it, then compare with the worked solution below.
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Worked solution

Step 1: Recall what each register is used for

  • MAR holds the address of the memory location currently being accessed (for example, the address of the next instruction to fetch), not the instruction itself.
  • MDR acts as a temporary stop for data or instructions travelling between RAM and the CPU. It holds the instruction only for the moment it arrives from RAM, before passing it onward.
  • CIR holds the actual bit pattern of the instruction that has been fetched, and keeps it there so the control unit can decode it.
  • ACC stores the running result of arithmetic or logic operations carried out by the ALU during the execute stage, it plays no part in decoding.

Step 2: Match the description to a register

The description says the register holds the instruction’s bit pattern unchanged for the whole decode stage, only being overwritten when the next fetch stage happens. That rules out the MAR (which holds an address, not an instruction) and the MDR (which only holds the instruction briefly, in transit, before it is copied onward). It also rules out the ACC, since the ACC is not involved until the execute stage, and even then it holds a calculated result, not the instruction itself.

Step 3: Confirm the match

Only the current instruction register is designed to hold the fetched instruction’s bit pattern for as long as the control unit needs to decode it.

Final answer

The register being described is the current instruction register (CIR), option C.