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CPU Architecture and the Fetch–Decode–Execute Cycle: Question 2

Syllabus 3.1

Structured 7 marks

A vending machine contains a small computer with a Von Neumann architecture. During its stock-check routine, the CPU is about to fetch the next machine-code instruction, which is stored at address 300 in RAM.

(a) Describe, in the correct order, what happens to this address and then to the instruction itself during the fetch stage of the FDE cycle. In your answer, name the specific register or bus involved at each step. [4]

(b) State the name of the CPU component that decodes the fetched instruction during the decode stage, and describe in one sentence what "decoding" an instruction means. [2]

(c) The decoded instruction turns out to be an arithmetic instruction that adds two values together. Identify the CPU component that carries out this addition during the execute stage. [1]

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Worked solution

Part (a): Tracing the fetch stage

The fetch stage moves both an address and an instruction around the CPU, in this order:

  1. The program counter (PC) currently holds the address 300, the location of the next instruction. [1]
  2. This address is copied into the memory address register (MAR), travelling along the address bus. [1]
  3. The MAR sends address 300 to RAM (again via the address bus), and the instruction stored at that address travels back into the memory data register (MDR) along the data bus. [1]
  4. The instruction is transferred from the MDR into the current instruction register (CIR), ready to be decoded, and the PC is incremented so it now holds the address of the next instruction to be fetched. [1]

Part (b): Decoding the instruction

The control unit (CU) is responsible for decoding. Decoding means interpreting the bit pattern now sitting in the CIR to work out exactly which operation is being requested and which data, registers or addresses it needs. It does not yet carry the operation out, it just figures out what needs to happen next.

Part (c): Executing an arithmetic instruction

Once the control unit knows the instruction is an addition, it is the arithmetic logic unit (ALU) that actually performs the calculation, combining the two values and typically leaving the result in the accumulator.

Final answers

  • (a) PC (300) → MAR via the address bus → RAM → MDR via the data bus → CIR, with the PC then incremented to the next address.
  • (b) The control unit (CU) decodes the instruction, working out what operation and data it needs.
  • (c) The arithmetic logic unit (ALU).